The present invention relates to a method and device for generating a clock signal synchronized with an input cycle signal.
In the prior art, a clock signal generation device is incorporated in, for example, an optical disc device capable of recording data to a recordable type optical disc, such as a digital versatile disc-recordable (DVD-R), to generate a recording clock signal used as a reference when recording data. The clock signal generation device normally includes a phase lock loop (PLL) circuit. A recording process is performed based on the recording clock signal generated by the clock signal generation device. Data recording is accurately performed in accordance with the rotation speed of the disc using the recording clock signal.
The recording clock signal is generated based on a wobble signal, which has a predetermined cycle and which is generated from the slight wobble of a guide groove (pregroove) formed on substantially the entire optical disc, or an LPP signal, which is generated from land prepits (LPPs) arranged at predetermined intervals along a track. In the optical disc device, when reproducing the data recorded on an optical disc, a reproduction clock signal may be generated to perform processing in accordance with the rotation speed of the optical disc.
Fluctuations in the rotation of the disc or tilting of the disc may produce jitter. Such jitter would shift the wobble signal in the direction of the time axis. Thus, the jitter may affect and shift the clock signal, which is generated from the wobble signal. As a result, the recording and reproduction of data may not be performed in a satisfactory manner. Accordingly, in the prior art, the gain of the PLL circuit is minimized to suppress the influence of jitter. Especially, in a voltage controlled oscillator (VCO) that configures a PLL circuit, an oscillation characteristic capable of generating the clock signal required by the optical disc device while minimizing the gain is set based on simulations conducted beforehand. The clock signal is generated based on the oscillation characteristic.
The setting of the oscillation characteristic of the voltage controlled oscillator in accordance with a minimized gain reduces the influence of jitter. However, there is a possibility that the required clock signal cannot be generated when voltage controlled oscillators have manufacturing differences. In other words, the use of a voltage controlled oscillator having a low gain oscillation characteristic narrows the applicable frequency band. Thus, if a deviation occurs in the oscillation characteristic due to manufacturing differences, when there is a request for the generation of a clock signal having a frequency corresponding to, for example, four times the disc rotation speed, there is a possibility that the voltage controlled oscillator cannot generate a clock signal with the required frequency. As a result, the setting of the oscillation characteristic of the voltage controlled oscillator in accordance with a minimized gain makes it difficult to cope with manufacturing differences. This may, in turn, reduce the recording and reproduction quality.
The problem caused by manufacturing differences between voltage controlled oscillators is not limited to a clock signal generation device incorporated in an optical disc device and may also occur in any clock signal generation device that generates a clock signal synchronized with a cycle signal including jitter.